SFF specifications are available at http://www.snia.org/sff/specifications
` or ftp://ftp.seagate.com/sff
`
`
`
`
`
`
`
`
`This specification was developed by the SFF Committee prior to it
`becoming the SFF TA (Technology Affiliate) TWG (Technical Working
`Group) of SNIA (Storage Networking Industry Association).
`
`
`
`
`
`
`
`Chairman SFF TA TWG
`Email: SFF-Chair@snia.org
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`The information below should be used instead of the equivalent herein.
`
`POINTS OF CONTACT:
`
`
`
`
`
`
`If you are interested in participating in the activities of the SFF TWG, the
`membership application can be found at:
`
`
`
`http://www.snia.org/sff/join
`
`The complete list of SFF Specifications which have been completed or are currently
`being worked on can be found at:
`
`
`
`http://www.snia.org/sff/specifications/SFF-8000.TXT
`
`The operations which complement the SNIA's TWG Policies & Procedures to guide the SFF
`TWG can be found at:
`
`
`
`http://www.snia.org/sff/specifications/SFF-8032.PDF
`
`
`Suggestions for improvement of this specification will be welcome, they should be
`submitted to:
`
`http://www.snia.org/feedback
`
`
`
`
`
`
`LUXSHARE EXHIBIT 1006
`Page 1 of 76
`
`

`

`** Information Specification ** INF-8438i Rev 1.0
`
` SFF Committee documentation may be purchased in hard copy or electronic form
` SFF specifications are available at ftp://ftp.seagate.com/sff
`
`
`
`_________________________________________________________________
`
`SFF-8436 QSFP+ was developed to update this specification
`_________________________________________________________________
`
`
`
`
` SFF Committee
`
` INF-8438i Specification for
`
` QSFP (Quad Small Formfactor Pluggable) Transceiver
`
` Rev 1.0 November 2006
`
`
`Secretariat: SFF Committee
`
`Abstract: This specification describes the QSFP (Quad Small Formfactor Pluggable)
`Transceivers developed by the MSA (Multiple Source Agreement) group. The following
`companies participated in the MSA:
`
` Avago Technologies Molex
` Beam Express Opnext
` Emcore Fiber Optics Optical Communication Products
` Emulex Picolight
` Fiberxon QLogic
` Finisar Reflex Photonics
` Force10 Networks The Siemon Company
` Helix AG Tyco Electronics
` JDS Uniphase Xloom Communications
` McDATA Zarlink Semiconductor
` Merge Optics
`
`This Information Specification was not developed or endorsed by the SFF Committee
`but was submitted for distribution on the basis that it is of interest to the
`storage industry.
`
`The copyright on the contents remains with the contributor.
`
`Contributors are not required to abide by the SFF patent policy. Readers are
`advised of the possibility that there may be patent issues associated with an
`implementation which relies upon the contents of an 'i' specification.
`
`SFF accepts no responsibility for the validity of the contents.
`
`POINTS OF CONTACT:
`
` Scott Kipp I. Dal Allan
` Technical Editor Chairman SFF Committee
` McDATA 14426 Black Walnut Court
` 4 McDATA Parkway Saratoga
` Broomfield CO 80021 CA 95070
`
` 720-558-3452 408-867-6630
` scott.kipp@mcdata.com endlcom@acm.org
`
`
`QSFP (Quad Small Formfactor Pluggable) Transceiver
`
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`

`

`** Information Specification ** INF-8438i Rev 1.0
`
` EXPRESSION OF SUPPORT BY MANUFACTURERS
`
`The following member companies of the SFF Committee voted in favor of this
`industry specification.
`
` AMCC
` Amphenol
` Avago
` Emulex
` FCI
` Fujitsu CPA
` Hewlett Packard
` Hitachi GST
` JDS Uniphase
` Molex
` Picolight
` Samsung
` Sun Microsystems
` Tyco
` Vitesse Semiconductor
`
`The following member companies of the SFF Committee voted to abstain on this
`industry specification.
`
` Clariphy
` Comax
` Cortina Systems
` Foxconn
` Seagate
`
`QSFP (Quad Small Formfactor Pluggable) Transceiver
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`

`

`** Information Specification ** INF-8438i Rev 1.0
`
` SFF COMMITTEE
`
`The SFF Committee is an industry group. The membership of the committee since its
`formation in August 1990 has included a mix of companies which are leaders across
`the industry.
`
`When 2 1/2" diameter disk drives were introduced, there was no commonality on
`external dimensions e.g. physical size, mounting locations, connector type,
`connector location, between vendors.
`
`The first use of these disk drives was in specific applications such as laptop
`portable computers and system integrators worked individually with vendors to
`develop the packaging. The result was wide diversity, and incompatibility.
`
`The problems faced by integrators, device suppliers, and component suppliers led
`to the formation of the SFF Committee as an industry ad hoc group to address the
`marketing and engineering considerations of the emerging new technology.
`
`During the development of the form factor definitions, other activities were
`suggested because participants in the SFF Committee faced more problems than the
`physical form factors of disk drives. In November 1992, the charter was expanded
`to address any issues of general interest and concern to the storage industry.
`The SFF Committee became a forum for resolving industry issues that are either
`not addressed by the standards process or need an immediate solution.
`
`Those companies which have agreed to support a specification are identified in
`the first pages of each SFF Specification. Industry consensus is not an essential
`requirement to publish an SFF Specification because it is recognized that in an
`emerging product area, there is room for more than one approach. By making the
`documentation on competing proposals available, an integrator can examine the
`alternatives available and select the product that is felt to be most suitable.
`
`SFF Committee meetings are held during T10 weeks (see www.t10.org), and Specific
`Subject Working Groups are held at the convenience of the participants. Material
`presented at SFF Committee meetings becomes public domain, and there are no
`restrictions on the open mailing of material presented at committee meetings.
`
`Most of the specifications developed by the SFF Committee have either been
`incorporated into standards or adopted as standards by EIA (Electronic Industries
`Association), ANSI (American National Standards Institute) and IEC (International
`Electrotechnical Commission).
`
`Suggestions for improvement of this specification will be welcome. They should be
`sent to the SFF Committee, 14426 Black Walnut Ct, Saratoga, CA 95070.
`
`QSFP (Quad Small Formfactor Pluggable) Transceiver
`
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`

`

`** Information Specification ** INF-8438i Rev 1.0
`
`The complete list of SFF Specifications which have been completed or are
`currently being worked on by the SFF Committee can be found at:
`
` ftp://ftp.seagate.com/sff/SFF-8000.TXT
`
`If you wish to know more about the SFF Committee, the principles which guide the
`activities can be found at:
`
` ftp://ftp.seagate.com/sff/SFF-8032.TXT
`
`If you are interested in participating or wish to follow the activities of the
`SFF Committee, the signup for membership and/or documentation can be found at:
`
` www.sffcommittee.com/ie/join.html
`
`or, the following application can be submitted.
`
` Name: ____________________________ Title: __________________________
`
` Company: ______________________________________________________________
`
` Address: ______________________________________________________________
`
` ______________________________________________________________
`
` Phone: ____________________________ Fax: ____________________________
`
` Email: ______________________________________________________________
`
` Please register me with the SFF Committee for one year.
`
` ___ Voting Membership w/Electronic documentation $ 2,160
`
` ___ Voting Membership w/Meeting documentation $ 1,800
`
` ___ Non-voting Observer w/Electronic documentation $ 660 U.S.
` $ 760 Overseas
`
` ___ Non-voting Observer w/Meeting documentation $ 300 U.S.
` $ 400 Overseas
`
` Check Payable to SFF Committee for $_________ is Enclosed
`
` Please invoice me for $_________ on PO #: ___________________
`
` MC/Visa/AmX______________________________________ Expires_________
`
` SFF Committee 408-867-6630
` 14426 Black Walnut Ct
` Saratoga CA 95070 endlcom@acm.org
`
`QSFP (Quad Small Formfactor Pluggable) Transceiver
`
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`

`

`Quad Small Form-factor Pluggable (QSFP)
`Transceiver Specification
`Revision 1.0
`
`QSFP Chair and Editor
`Scott Kipp
`McDATA Corporation
`4 McDATA Parkway
`Broomfield, CO 80021
`Voice: 720-558-3452
`Fax: 720-558-8999
`scott.kipp@mcdata.com
`
`QSFP Secretary
`Alex Ngi
`Helix AG
`Seefeldstrasse 45
`CH-8008 Zurich
`Switzerland
`Voice: (41) 44-260-2434
`Fax: (41) 44-260-2433
`an@helix.ch
`
`This is the final released draft of this specification.
`
`QSFP Public Specification
`
`1
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`

`

`Legal Disclaimer
`
`The promoters of the QSFP specification revision 0.96 (“QSFP MSA GROUP”), and
`many contributors, collaborated to develop a specification for a Multi-channel small foot
`print pluggable module. The promoters stated a wish to encourage broad and rapid
`industry adoption of the specification.
`This version is the result of such collaboration. In the future the QSFP specification may
`be offered to more formal standards bodies to further support the adoption of the
`specification.
`THIS SPECIFICATION IS PROVIDED “AS IS” WITH NO WARRANTIES
`WHATSOEVER, INCLUDING ANY WARRANTY OF MERCHANTABILITY,
`NONINFRINGEMENT, FITNESS FOR ANY PARTICULAR PURPOSE, OR ANY
`WARRANTY OTHERWISE ARISING OUT OF ANY PROPOSAL, SPECIFICATION OR
`SAMPLE. THE QSFP PROMOTERS DISCLAIM ALL LIABILITY, INCLUDING LIABILITY
`FOR INFRINGEMENT OF ANY PROPRIETARY RIGHTS, RELATING TO USE OF
`INFORMATION IN THIS SPECIFICATION. IN NO EVENT SHALL THE QSFP
`PROMOTERS, CONTRIBUTORS OR ADOPTERS BE LIABLE FOR ANY DIRECT,
`INDIRECT, SPECIAL, EXEMPLARY, PUNITIVE, OR CONSEQUENTIAL DAMAGES,
`INCLUDING, WITHOUT LIMITATION, LOST PROFITS, EVEN IF ADVISED OF THE
`POSSIBILITY OF SUCH DAMAGES.
`This specification may contain, and sometimes even require the use of intellectual
`property owned by others. No license, express or implied, by estoppel or otherwise, to
`any intellectual property rights is granted herein, except that a license is hereby granted
`to copy and reproduce this specification for internal use only.
`
`
`QSFP Public Specification
`
`2
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`

`

`Revision History
`
`REVISION
`0.1
`0.2
`0.3
`0.4
`0.5
`0.6
`0.61
`0.62
`0.63
`
`0.64
`
`0.70
`
`RELEASE DATE
`October 25, 2004
`November 25, 2004
`December 9, 2004
`February 24, 2005
`March 5, 2005
`June 20, 2005
`June 27, 2005
`August 4, 2005
`September 27, 2005
`
`February 2, 2006
`
`March 1, 2006
`
`0.75
`
`May 17, 2006
`
`0.80
`
`0.85
`
`0.90
`
`0.95
`
`0.96
`
`June 28, 2006
`
`July 18, 2006
`
`July 25, 2006
`
`August 1, 2006
`
`November 15, 2006
`
`1.0
`
`December 1, 2006
`
`CHANGE
`First Draft
`Second Draft
`Third Draft
`Fourth Draft
`fifth Draft
`Mechanical Clause
`Electrical and Mechanical Clauses
`Electrical, mechanical Clauses, Layout
`Electrical specification improvements
`Electrical specification improvements, changed
`cage specification, finished memory map
`Reorganization of mechanical clauses to specify
`module only. Completed Memory Map.
`Changes made due to letter ballot review. All
`changes are documented in the comment data-
`base and major changes were regarding
`LPMode_Reset pin, Packet Error Checking,
`removed Appendix A and filled in missing
`details.
`Mechanical changes made due to letter ballot
`review. Changes due to review of Draft 0.75.
`Mechanical changes made due to letter ballot
`review of Revision 0.8. Management Section
`reorganized in page, byte order and Rate Select
`explanation improved.
`Minor changes made due to letter ballot review
`of Revision 0.85. Rate Select explanation
`improved and length of module outside of cage
`extended by 5 mm.
`Editorial changes to make this a public draft.
`Changes due to public review. LPMode_Reset
`pin was converted to ResetL and LPMode pins.
`Mechanical clarifications to connector, module
`and cage.
`Minor editorial changes due to review of Draft
`0.96.
`
`QSFP Public Specification
`
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`

`

`Table of Contents
`
` Page
`
`1 Contact Information for Member Companies..............................................................................................................9
`1.1 Acknowledgement of Contributors..................................................................................................................10
`
`2 Scope..........................................................................................................................................................................11
`
`3 Electrical Specification........... ...................................................................................................................................14
`3.1 Electrical Connector......... ...............................................................................................................................14
`3.1.1 Low Speed Electrical Hardware Pins.......... ..........................................................................................17
`3.1.2 Low Speed Electrical Specification.......................................................................................................18
`3.1.3 High Speed Electrical Specification......................................................................................................19
`3.2 Power Requirements........................................................................................................................................19
`3.2.1 Host Board Power Supply Filtering.......... ............................................................................................20
`3.3 ESD..................................................................................................................................................................21
`
`4 Mechanical and Board Definition..............................................................................................................................22
`4.1 Introduction......................................................................................................................................................22
`4.2 QSFP Datums and Component Alignment......................................................................................................23
`4.3 QSFP Transceiver Mechanical Package Dimensions......................................................................................24
`4.3.1 Mating of QSFP Transceiver PCB to QSFP Electrical Connector........................................................27
`4.4 Host PCB Layout.............................................................................................................................................28
`4.4.1 Insertion, Extraction and Retention Forces for QSFP Transceivers......................................................29
`4.5 Color Coding and Labeling of QSFP Transceivers......... ................................................................................30
`4.6 Bezel for Systems Using QSFP Transceivers..................................................................................................31
`4.7 QSFP Electrical Connector Mechanical......... .................................................................................................32
`4.8 Individual QSFP Cage Assembly......... ...........................................................................................................33
`4.8.1 QSFP Heat Sink Clip Dimensions.........................................................................................................35
`4.8.2 QSFP Heat Sink Dimensions.................................................................................................................36
`4.8.3 Light Pipes.............................................................................................................................................37
`4.9 Dust / EMI Cover............................................................................................................................................37
`4.10 Optical Interface......... ...................................................................................................................................37
`
`5 Environmental and Thermal........... ...........................................................................................................................39
`5.1 Thermal Requirements.....................................................................................................................................39
`
`6 Management Interface........... ....................................................................................................................................40
`6.1 Introduction......................................................................................................................................................40
`6.2 Timing Specification......... ..............................................................................................................................40
`6.2.1 Introduction.......... .................................................................................................................................40
`6.2.2 Management Interface Timing Specification.......... ..............................................................................40
`6.2.3 Serial Interface Protocol.......... ..............................................................................................................40
`6.3 Memory Interaction Specifications..................................................................................................................42
`6.3.1 Timing for Soft Control and Status Functions.......... ............................................................................43
`6.4 Device Addressing and Operation......... ..........................................................................................................44
`6.5 Read/Write Functionality.................................................................................................................................45
`6.5.1 QSFP Memory Address Counter (Read AND Write Operations).........................................................45
`6.5.2 Read Operations (Current Address Read).......... ...................................................................................46
`6.5.3 Read Operations (Random Read)..........................................................................................................46
`6.5.4 Write Operations (BYTE Write).......... .................................................................................................47
`
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`6.5.5 Write Operations (Sequential Write).....................................................................................................48
`6.5.6 Write Operations (Acknowledge Polling).......... ...................................................................................48
`6.6 QSFP Memory Map.........................................................................................................................................48
`6.6.1 Lower Memory Map..............................................................................................................................50
`6.6.2 Upper Memory Map Page 00h.......... ....................................................................................................59
`6.6.3 Upper Memory Map Page 01h.......... ....................................................................................................68
`6.6.4 User Writable and Vendor Specific Memory........................................................................................68
`6.6.5 Upper Memory Page 03h.......................................................................................................................69
`
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`
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`

`List of Figures
`
`Page
`
`1. Application Reference Model ..................................................................................................................................13
`2. QSFP Transceiver Pad Layout .................................................................................................................................14
`3. Example QSFP Host Board Schematic ....................................................................................................................16
`4. Recommended Host Board Power Supply Filtering ................................................................................................20
`5. QSFP Module Rendering .........................................................................................................................................22
`6. QSFP Datum Alignment, Depth ..............................................................................................................................24
`7. Drawing of QSFP Transceiver (Part 1 of 2) ............................................................................................................25
`8. Drawing of QSFP Transceiver (Part 2 of 2) ............................................................................................................26
`9. Pattern Layout for QSFP Printed Circuit Board ......................................................................................................27
`10. QSFP Host PCB Mechanical Layout .....................................................................................................................28
`11.QSFP Host PCB Mechanical Layout, Detail Z .......................................................................................................29
`12. Recommended Bezel Design .................................................................................................................................31
`13. QSFP Transceiver Electrical Connector Illustration ..............................................................................................32
`14. QSFP Electrical Connector Specification ..............................................................................................................32
`15. Cage and Optional Heat Sink Design (exploded view) .........................................................................................33
`16. 1-by-1 cage .............................................................................................................................................................34
`17. QSFP Heat Sink Clip .............................................................................................................................................35
`18. QSFP Heat Sink ....................................................................................................................................................36
`19. Dust / EMI Cover ...................................................................................................................................................37
`20. QSFP Optical Receptacle and Channel Orientation ..............................................................................................38
`21. QSFP Timing Diagram ..........................................................................................................................................40
`22. QSFP Device Address ............................................................................................................................................45
`23. QSFP Current Address Read Operation ................................................................................................................46
`24. QSFP Random Read ..............................................................................................................................................46
`25. Sequential Address Read Starting at QSFP Current Address ................................................................................47
`26. Sequential Address Read Starting with Random QSFP Read ...............................................................................47
`27. QSFP Write Byte Operation ..................................................................................................................................47
`28. QSFP Sequential Write Operation .........................................................................................................................48
`29. QSFP Memory Map ...............................................................................................................................................49
`
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`

`List of Tables
`
` Page
`
`1. Multimode Fiber Applications............................................................................................................................12
`2.
`Singlemode Fiber Applications ..........................................................................................................................12
`3.
`Pin Function Definition ......................................................................................................................................15
`4.
`Power Mode Truth Table....................................................................................................................................19
`5.
`Low Speed Control and Sense Signals ...............................................................................................................19
`6.
`Power Supply Specification................................................................................................................................21
`7.
`Power Budget Classification...............................................................................................................................22
`8.
`Definition of Datums ..........................................................................................................................................24
`9.
`Insertion, Extraction and Retention Forces.........................................................................................................30
`10. Temperature Classification of Module Case ......................................................................................................39
`11. QSFP 2-Wire Timing Specifications ..................................................................................................................41
`12. QSFP Memory Specification ..............................................................................................................................42
`13. Single Byte Writable Memory Block .................................................................................................................42
`14. Multiple Byte Writable Memory Block..............................................................................................................42
`15.
`I/O Timing for Soft Control and Status Functions .............................................................................................43
`16.
`I/O Timing for Squelch and Disable...................................................................................................................44
`17. Lower Memory Map Page A0h ..........................................................................................................................50
`18. Status Indicators..................................................................................................................................................50
`19. Channel Status Interrupt Flags............................................................................................................................51
`20. Module Monitor Interrupt Flags .........................................................................................................................51
`21. Channel Monitor Interrupt Flags ........................................................................................................................52
`22. Module Monitoring Values.................................................................................................................................53
`23. Channel Monitoring Values................................................................................................................................54
`24. Control Bytes ......................................................................................................................................................55
`25.
`IntL Masking Bits for Module and Channel Status Interrupts............................................................................56
`26. Functionality of RxN_Rate_Select with Extended Rate Selection.....................................................................57
`27. Definition of Application Select (Bytes 89 to 92) ..............................................................................................57
`28. Detailed Description of Control Mode (Bytes 89 to 92, bit 7 and 6)) ................................................................58
`29. Serial ID: Data Fields .........................................................................................................................................59
`30.
`Identifier Values .................................................................................................................................................60
`31. Extended Identifier Values .................................................................................................................................60
`32. Connector Values................................................................................................................................................61
`33. Transceiver Values .............................................................................................................................................62
`34. Encoding Values .................................................................................................................................................63
`35. Extended RateSelect Compliance Tag Assignment............................................................................................63
`36. Description of Device Technology .....................................................................................................................64
`37. Transmitter Technology......................................................................................................................................64
`38. Extended Transceiver Code Values....................................................................................................................65
`39. Option Values .....................................................................................................................................................66
`40. Date Codes..........................................................................................................................................................67
`41. Diagnostic Monitoring Type...............................................................................................................................67
`
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`

`42. Enhanced Options (byte 221)) ..................................................................................................................