Application Note 35
`August 1989
`
`Step-Down Switching Regulators
`Jim Williams
`
`lost in this voltage-to-current-to-magnetic fi eld-to-cur-
`rent-to-charge-to-voltage conversion. In practice, the
`circuit elements have losses, but step-down effi ciency is
`still higher than with inherently dissipative (e.g., voltage
`divider) approaches. Figure 2 feedback controls the basic
`circuit to regulate output voltage. In this case switch on-
`time (e.g., inductor charge time) is varied to maintain the
`output against changes in input or loading.
`
`REGULATED
`OUTPUT
`
`VREF
`
`AN35 F02
`
`– +
`
`IN
`
`PULSE
`WIDTH
`MODULATOR
`
`Figure 2. Conceptual Feedback Controlled Step-Down Regulator
`
`Practical Step-Down Switching Regulator
`Figure 3, a practical circuit using the LT®10742 IC regulator,
`shows similarities to the conceptual regulator. Some new
`elements have also appeared. Components at the LT1074’s
`“VCOMP” pin control the IC’s frequency compensation,
`stabilizing the feedback loop. The feedback resistors are
`selected to force the “feedback” pin to the device’s internal
`2.5V reference value. Figure 4 shows operating waveforms
`for the regulator at VIN = 28V with a 5V, 1A load.
`L, LT, LTC, LTM, Linear Technology and the Linear logo are registered
`trademarks of Linear Technology Corporation. All other trademarks are the
`property of their respective owners.
`Note 1: While linear regulators cannot compete with switchers, they can
`achieve signifi cantly better effi ciencies than generally supposed. See LTC
`Application Note 32, “High Effi ciency Linear Regulators,” for details.
`Note 2: See Appendix A for details on this device.
`
`A substantial percentage of regulator requirements
`involve stepping down the primary voltage. Although
`linear regulators can do this, they cannot achieve the
`effi ciency of switching based approaches1. The theory
`supporting step-down (“buck”) switching regulation is
`well established, and has been exploited for some time.
`Convenient, easily applied ICs allowing implementation
`of practical circuits are, however, relatively new. These
`devices permit broad application of step-down regulation
`with minimal complexity and low cost. Additionally, more
`complex functions incorporating step-down regulation
`become realizable.
`
`Basic Step Down Circuit
`Figure 1 is a conceptual voltage step-down or “buck”
`circuit. When the switch closes the input voltage appears
`at the inductor. Current fl owing through the inductor-ca-
`pacitor combination builds over time. When the switch
`
`IN
`
`OUT
`
`AN35 F01
`
`Figure 1. Conceptual Voltage Step-Down (“Buck”) Circuit
`
`opens current fl ow ceases and the magnetic fi eld around
`the inductor collapses. Faraday teaches that the voltage
`induced by the collapsing magnetic fi eld is opposite to the
`originally applied voltage. As such, the inductor’s left side
`heads negative and is clamped by the diode. The capaci-
`tors accumulated charge has no discharge path, and a DC
`potential appears at the output. This DC potential is lower
`than the input because the inductor limits current during
`the switch’s on-time. Ideally, there are no dissipative ele-
`ments in this voltage step-down conversion. Although the
`output voltage is lower than the input, there is no energy
`
`an35f
`
`AN35-1
`
`MICROCHIP TECH. INC. - EXHIBIT 1029
`MICROCHIP TECH. INC. V. HD SILICON SOLS. - IPR2021-01265 - Page 001
`
`

`

`Application Note 35
`
`L1
`150μH
`
`+
`
`MBR745
`
`1000μF
`
`VIN
`
`VIN
`
`VSW
`
`LT1074
`
`VC
`
`GND
`
`FB
`
`2k
`
`0.1
`
`L1: PULSE ENGINEERING, INC. #PE-51516
`
`5V
`OUTPUT
`
`2.8k
`1%
`
`2.2k
`1%
`
`AN35 F03
`
`A = 20V/DIV
`
`B = 1A/DIV
`
`C = 0.2A/DIV
`ON 1A DC LEVEL
`
`D = 1A/DIV
`
`Figure 3. A Practical Step-Down Regulator Using the LT1074
`
`HORIZ = 5μs/DIV
`
`AN35 F04
`
`Figure 4. Waveforms for the Step-Down Regulator at
`VIN = 28V and VOUT = 5V at 1A
`
`VIN = 10V
`
`LT1074
`
`LT1086
`
`VIN = 15.5V
`VIN = 10.1V
`LM317
`
`VIN = 6.5V
`
`VIN = 8V
`
`VIN = 12.4V
`
`VOUT = 5V, 1A
`LM317 DROPOUT = 3V
`LT1086 DROPOUT = 1.5V
`
`80
`
`90
`
`110
`120
`100
`AC LINE VOLTAGE
`
`130
`
`140
`
`AN35 F06
`
`100
`
`90
`
`80
`
`70
`
`60
`
`50
`
`40
`
`30
`
`20
`
`10
`
`0
`
`EFFICIENCY (%)
`
`A = 20V/DIV
`
`B = 1A/DIV
`
`C = 0.2A/DIV
`ON 1A DC LEVEL
`
`D = 1A/DIV
`
`HORIZ = 5μs/DIV
`
`AN35 F05
`
`Figure 5. Waveforms for the Step-Down Regulator at VIN = 12V
`and VOUT = 5V at 1A
`
`Figure 6. Efficiency vs AC Line Voltage for the LT1074. LT1086
`and LM317 Linear Regulators are Shown for Comparison
`
`Trace A is the VSW pin voltage and Trace B is its current.
`Inductor current3 appears in Trace C and diode current
`is Trace D. Examination of the current waveforms allows
`determination of the VSW and diode path contributions to
`inductor current. Note that the inductor current’s waveform
`occurs on top of a 1A DC level. Figure 5 shows signifi cant
`duty cycle changes when VIN is reduced to 12V. The lower
`input voltage requires longer inductor charge times to
`maintain the output. The LT1074 controls inductor charge
`characteristics (see Appendix A for operating details),
`with resulting waveform shape and time proportioning
`changes.
`
`Figure 6 compares this circuit’s effi ciency with linear
`regulators in a common and important situation. Effi cient
`regulation under varying AC line conditions is a frequent
`requirement. The fi gure assumes the AC line has been
`transformed down to acceptable input voltages. The input
`voltages shown correspond to the AC line voltages given
`on the horizontal axis. Effi ciency for the LM317 and LT1086
`linear regulators suffers over the wide input range.
`Note 3: Methods for selecting appropriate inductors are discussed in
`Appendix B.
`
`AN35-2
`
`an35f
`
`MICROCHIP TECH. INC. - EXHIBIT 1029
`MICROCHIP TECH. INC. V. HD SILICON SOLS. - IPR2021-01265 - Page 002
`
`

`

`Application Note 35
`
`Dual Output Step-Down Regulator
`Figure 8, a logical extension of the basic step-down con-
`verter, provides positive and negative outputs. The circuit
`is essentially identical to Figure 3’s basic converter with the
`addition of a coupled winding to L1. This fl oating winding’s
`output is rectifi ed, fi ltered and regulated to a –5V output.
`The fl oating bias to the LT1086 positive voltage regulator
`permits negative outputs by assigning the regulator’s
`output terminal to ground. Negative output power is set
`by fl ux pick-up from L1’s driven winding. With a 2A load
`at the +15 output the –5V output can supply over 500mA.
`Because L1’s secondary winding is fl oating its output may
`be referred to any point within the breakdown capability
`of the device. Hence, the secondary output could be 5V
`or, if stacked on the +15 output, 20V.
`
`Negative Output Regulators
`Negative outputs can also be obtained with a simple 2-ter-
`minal inductor. Figure 9 demonstrates this by essentially
`grounding the inductor and steering the catch diodes
`negative current to the output. A1 facilitates loop closure
`by providing a scaled inversion of the negative output to
`the LT1074’s feedback pin. The 1% resistors set the scale
`factor (e.g., output voltage) and the RC network around A1
`gives frequency compensation. Waveforms for this circuit
`are reminiscent of Figure 5, with the exception that diode
`
`Note 4: See Reference 1.
`
`VOUT = 5V
`IOUT = 1A
`
`10
`
`12
`
`14
`
`20 22
`16
`18
`INPUT VOLTAGE
`
`24
`
`26
`
`28
`
`30
`
`AN35 F07
`
`100
`
`90
`
`80
`
`70
`
`60
`
`50
`
`40
`
`30
`
`20
`
`10
`
`0
`
`EFFICIENCY (%)
`
`Figure 7. Efficiency Plot for Figure 3. Higher Input Voltages
`Minimize Effects of Saturation Losses, Resulting in Increased
`Efficiency
`
`The LT1086 is notably better because its lower dropout
`voltage cuts dissipation over the range. Switching pre-
`regulation4 can reduce these losses, but cannot equal
`the LT1074’s performance. The plot shows minimum
`effi ciency of 83%, with some improvement over the full
`AC line excursion. Figure 7 details performance. Effi ciency
`approaches 90% as input voltage rises. This is due to
`minimization of the effects of fi xed diode and LT1074 junc-
`tion losses as input increases. At low inputs these losses
`are a higher percentage of available supply, degrading
`effi ciency. Higher inputs make the fi xed losses a smaller
`percentage, improving effi ciency. Appendix D presents
`detail on optimizing circuitry for effi ciency.
`
`28V
`INPUT
`
`VIN
`
`VSW
`
`LT1074
`
`VC
`
`GND
`
`FB
`
`2k
`
`0.1μF
`
`MUR120
`
`+
`
`2•
`
`L1
`
`1
`
`4
`MBR745
`
`3
`
`•
`
`+
`
`1000μF
`
`LT1086
`OUT
`
`IN
`
`ADJ
`
`470μF
`
`+
`
`47μF
`
`120Ω
`1%
`
`390Ω
`1%
`
`L1: PULSE ENGINEERING, INC. #PE-65050
`
`15V
`OUTPUT
`
`24.9k
`1%
`
`4.99k
`1%
`
`–5V
`OUTPUT
`
`AN35 F08
`
`Figure 8. Coupled Inductor Provides Positive and Negative Outputs
`
`an35f
`
`AN35-3
`
`MICROCHIP TECH. INC. - EXHIBIT 1029
`MICROCHIP TECH. INC. V. HD SILICON SOLS. - IPR2021-01265 - Page 003
`
`

`

`Application Note 35
`
`VSW
`
`LT1074
`
`GND
`
`FB
`
`12V
`INPUT
`
`VIN
`
`VC
`
`NC
`
`MBR745
`
`L1
`55μH
`
`4.7k
`
`1000μF
`
`+
`
`0.33
`
`–5V
`OUTPUT
`
`24k
`1%
`
`1N4148
`
`AN35 F09
`
`12k
`1%
`
`12V
`INPUT
`
`– +
`
`A1
`LT1006
`
`L1: PULSE ENGINEERING, INC. #PE-92116
`
`Figure 9. A Negative Output Step-Down Regulator
`
`current (Trace D) is negative. Traces A, B and C are VSW
`voltage, inductor current and VSW current respectively.
`Figure 11, commonly referred to as “Nelson’s Circuit,”
`provides the same function as the previous circuit, but
`eliminates the level-shifting op amp. This design accom-
`plishes the level shift by connecting the LT1074’s “ground”
`pin to the negative output. Feedback is sensed from circuit
`ground, and the regulator forces its feedback pin 2.5V above
`its “ground” pin. Circuit ground is common to input and
`output, making system use easy. Operating waveforms
`are essentially identical to Figure 10. Advantages of the
`previous circuit compared to this one are that the LT1074
`package can directly contact a grounded heat sink and that
`control signals may be directly interfaced to the ground
`referred pins.
`The inductor values in both negative output designs are
`notably lower than in the positive case. This is necessitated
`
`A = 20V/DIV
`
`B = 1A/DIV
`
`C = 4A/DIV
`
`D = 4A/DIV
`
`AN35-4
`
`HORIZ = 5μs/DIV
`Figure 10. Figure 9’s Waveforms
`
`AN35 F10
`
`by the reduced loop phase margin of these circuits. Higher
`inductance values, while preferable for limiting peak cur-
`rent, will cause loop instability or outright oscillation.
`
`Current-Boosted Step-Down Regulator
`Figure 12 shows a way to obtain signifi cantly higher
`output currents by utilizing effi cient energy storage in
`the LT1074 output inductor. This technique increases the
`duty cycle over the standard step-down regulator allowing
`more energy to be stored in the inductor. The increased
`output current is achieved at the expense of higher output
`voltage ripple.
`The operating waveforms for this circuit are shown in
`Figure 13. The circuit operating characteristics are similar
`to that of the step-down regulator (Figure 3). During the
`VSW (Trace A) “on” time the input voltage is applied to one
`end of the coupled inductor. Current through the VSW pin
`(Trace B) ramps up almost instantaneously (since inductor
`current (Trace F) is present) and then slows as energy is
`stored in the core. The current proceeds into the inductor
`(Trace D) and fi nally is delivered to the load. When the VSW
`pin goes off, current is no longer available to charge the
`inductor. The magnetic fi eld collapses, causing the VSW
`pin voltage to go negative. At this point similarity with
`the basic regulator vanishes. In this modifi ed version the
`output current (Trace F) receives a boost as the magnetic
`fi eld collapses. This results when the energy stored in
`
`an35f
`
`MICROCHIP TECH. INC. - EXHIBIT 1029
`MICROCHIP TECH. INC. V. HD SILICON SOLS. - IPR2021-01265 - Page 004
`
`

`

`Application Note 35
`
`VIN
`
`+
`
`+
`
`22μF
`
`22μF
`
`VIN
`
`VSW
`
`–5VOUT
`
`MBR745
`
`L1
`14μH
`
`1000μF
`
`+
`
`LT1074
`
`VC
`
`GND
`
`FB
`
`1k
`
`1μF
`
`2.8k
`
`2.2k
`
`L1 = PULSE ENGINEERING, INC. #PE-51509
`
`AN35 F11
`
`Figure 11. Nelson’s Circuit...A (Better) Negative Output Step-Down Regulator
`
`VIN
`20V TO 30V
`
`+
`
`VIN
`
`VSW
`
`220μF
`
`LT1074
`
`GND
`
`FB
`
`3•
`
`L1
`
`2N
`
`D1
`
`1•
`
`1
`
`D2
`
`1000pF
`
`+
`
`5VOUT
`10A
`
`C1
`3000μF
`
`510Ω
`
`0.33
`
`50Ω
`
`2k*
`
`150Ω
`
`330pF
`
`150Ω
`
`1μF
`
`* = 1% FILM RESISTOR
`L1 = PULSE ENGINEERING, INC. #PR-65282
`D1 = MUR110
`D2 = 1N5831
`
`2k*
`
`AN35 F12
`
`Figure 12. “Current Boosted” Step-Down Regulator. Boost Current is Supplied By Energy Stored in the Tapped Inductor
`
`the core is transferred to the output. This current step
`circulates through C1 and D2 (Trace E), somewhat increas-
`ing output voltage ripple. Not all the energy is transferred
`to the “1” winding. Current (Trace C) will continue to fl ow
`in the “N” winding due to leakage inductance. A snubber
`network suppresses the effects of this leakage inductance.
`For lowest snubber losses the specifi ed tapped inductor
`is bifi lar wound for maximum coupling.
`
`Post Regulation-Fixed Case
`In most instances the LT1074 output will be applied directly
`to the load. Those cases requiring faster transient response
`or reduced noise will benefi t from linear post regulation. In
`Figure 14 a 3-terminal regulator follows the LT1074 output.
`The LT1074 output is set to provide just enough voltage
`
`A = 50V/DIV
`
`B = 5A/DIV
`
`C = 10A/DIV
`D = 10A/DIV
`E = 10A/DIV
`
`F = 10A/DIV
`
`HORIZ = 2μs/DIV
`Figure 13. AC Current Flow for the Boosted Regulator
`
`AN35 F10
`
`to the LT1084 to maintain regulation. The LT1084’s low
`dropout characteristics combined with a high circuit input
`voltage minimizes the overall effi ciency penalty.
`
`an35f
`
`AN35-5
`
`MICROCHIP TECH. INC. - EXHIBIT 1029
`MICROCHIP TECH. INC. V. HD SILICON SOLS. - IPR2021-01265 - Page 005
`
`

`

`Application Note 35
`
`L1
`150μH
`
`MBR745
`
`+
`
`1000μF
`
`VIN
`
`VIN
`
`VSW
`
`LT1074
`
`VC
`
`GND
`
`FB
`
`2k
`
`0.1
`
`L1: PULSE ENGINEERING, INC. #PE-51516
`
`5VOUT
`
`+
`
`47μF
`
`≈6.5V
`
`LT1084-5
`
`4.12k
`1%
`
`2.49k
`1%
`
`AN35 F14
`
`Figure 14. Linear Post-Reglator Improves Noise and Transient Response
`
`Post Regulation-Variable Case
`Some situations require variable linear post regulation.
`Figure 15 does this with little effi ciency sacrifi ce. The
`LT1085 operates in normal fashion, supplying a variable
`1.2V to 28V output. The remainder of the circuit forms
`a switched mode pre-regulator which maintains a small,
`fi xed voltage across the LT1085 regardless of its output
`voltage. A1 biases the LT1074 to produce whatever voltage
`is necessary to maintain the “E diodes” potential across the
`LT1085. A1’s inputs are balanced when the LT1085 output
`is “E diodes” above its input. A1 maintains this condition
`regardless of line, load or output voltage conditions.
`Thus, good effi ciency is maintained over the full range of
`output voltages. The RC network at A1 compensates the
`loop. Loop start-up is assured by deliberately introduc-
`ing a positive offset to A1. This is done by grounding
`A1’s appropriate balance pin (5), resulting in a positive
`6mV offset. This increases amplifi er drift, and is normally
`considered poor practice, but causes no measurable error
`in this application.
`As shown, the circuit cannot produce outputs below the
`LT1085’s 1.2V reference. Applications requiring output
`adjustability down to 0V will benefi t from option “A”
`shown on the schematic. This arrangement replaces L1
`with L2. L2’s primary performs the same function as L1
`and its coupled secondary winding produces a negative
`bias output (–V). The full-wave bridge rectifi cation is
`necessitated by widely varying duty cycles. A2 and its at-
`tendant circuitry replace all components associated with
`
`the LT1085 VADJ pin. The LT1004 reference terminates
`the 10k to 250k feedback string at –1.2V with A2 provid-
`ing buffered drive to the LT1085 VADJ pin. The negative
`bias allows regulated LT1085 outputs down to 0V. The –V
`potential derived from L2’s secondary varies consider-
`ably with operating conditions. The high feedback string
`values and A2’s buffering ensure stable circuit operation
`for “starved” values of –V.
`
`Low Quiescent Current Regulators
`Many applications require very wide ranges of power sup-
`ply output current. Normal conditions require currents in
`the ampere range, while standby or “sleep” modes draw
`only microamperes. A typical laptop computer may draw
`1 to 2 amperes running while needing only a few hundred
`microamps for memory when turned off. In theory, any
`regulator designed for loop stability under no-load condi-
`tions will work. In practice, a converter’s relatively large
`quiescent current may cause unacceptable battery drain
`during low output current intervals. Figure 16’s simple
`loop effectively reduces circuit quiescent current from
`6mA to only 150μA. It does this by utilizing the LT1074’s
`shutdown pin. When this pin is pulled within 350mV of
`ground the IC shuts down, pulling only 100μA. Comparator
`C1 combines with the LT1004 reference and Q1 to form a
`“bang-bang” control loop around the LT1074. The LT1074’s
`internal feedback amplifi er and voltage reference are by-
`passed by this loop’s operation. When the circuit output
`(Trace C, Figure 17) falls slightly below 5V C1’s output
`(Trace A) switches low, turning off Q1 and enabling the
`
`AN35-6
`
`an35f
`
`MICROCHIP TECH. INC. - EXHIBIT 1029
`MICROCHIP TECH. INC. V. HD SILICON SOLS. - IPR2021-01265 - Page 006
`
`

`

`Application Note 35
`
`EDIODES
`(≈1.8V)
`
`LT1085
`IN
`OUT
`ADJ
`
`“D”
`
`+
`
`110Ω*
`
`47μF
`
`1.2V TO 28VOUT
`(SEE OPTION “A” FOR
`OUTPUT DOWN TO 0V)
`
`+
`
`10μF
`
`2.5k
`OUTPUT
`ADJUST
`
`1N4148s
`EDIODES
`(≈1.8V)
`
`3k
`
`35V
`INPUT
`
`VIN
`
`VSW
`
`LT1074
`
`VC
`
`GND
`
`FB
`
`1N4148
`
`NC
`
`“B”
`
`“C”
`
`L1
`150μH
`
`+
`
`MBR745
`
`0.22
`
`35V INPUT
`
`1000μF
`
`3.9k
`
`– +
`
`A1
`LT1006
`
`4
`
`5
`
`OPTION “A”
`(FOR OUTPUT
`DOWN TO 0V)
`SEE TEXT FOR
`DISCUSSION
`
`TO POINT “B”
`
`TO POINT “C”
`
`35V INPUT
`7
`
`TO POINT “D”
`
`TO LT1085 OUTPUT
`
`3
`
`2
`
`4.7k
`
`10k*
`
`0.1μF
`
`250k
`OUTPUT
`ADJUST
`
`LT1004
`1.2V
`
`AN35 F15
`
`–+
`
`A2
`LT1006
`
`4
`
`L2
`
`4
`
`1
`
`3
`
`2
`
`6
`
`–V
`
`1N4148
`(cid:115)4
`
`10μF
`
`+
`
`L1: PULSE ENGINEERING, INC. #PE-51516
`L2: PULSE ENGINEERING, INC. #PE-65050
`
`Figure 15. Adjustable Linear Post-Regulator Maintains Efficiency Over Widely Varying Operating Conditions
`
`5VOUT
`
`1M
`1%
`
`340k
`1%
`
`AN35 F16
`
`L1
`150μH
`
`VSW
`
`LT1074
`
`+
`
`MBR745
`
`1000μF
`
`470k
`
`LT1004
`1.2V
`
`12V
`INPUT
`
`GND
`
`SD
`
`12V INPUT
`
`–+
`
`C1
`1/2 LT1017
`
`1M
`
`Q1
`2N3904
`
`12V
`INPUT
`
`NC
`
`VIN
`
`FB
`VC
`
`NC
`
`L1: PULSE ENGINEERING, INC. #PE-51516
`
`Figure 16. A Simple Loop Reduces Quiescent Current to 150μA
`
`an35f
`
`AN35-7
`
`MICROCHIP TECH. INC. - EXHIBIT 1029
`MICROCHIP TECH. INC. V. HD SILICON SOLS. - IPR2021-01265 - Page 007
`
`

`

`Application Note 35
`
`LT1074. The VSW pin (Trace B) pulses at full duty cycle,
`forcing the output back above 5V. C1 then biases Q1 again,
`the LT1074 goes into shutdown, and loop action repeats.
`The frequency of this on-off control action is directly load
`dependent, with typical repetition rates of 0.2Hz at no load.
`Short on-times keep duty cycle low, resulting in the small
`effective quiescent current noted. The on-off operation
`combines with the LC fi ltering action in the regulator’s
`VSW line to generate an output hysteresis of about 50mV
`(again, see Figure 17, Trace C).
`
`A = 10V/DIV
`
`B = 10V/DIV
`
`C = 0.1V/DIV
`AC-COUPLED
`ON 5V DC LEVEL
`
`HORIZ = 100μs/DIV
`Figure 17. The Low Quiescent Current Loop’s Waveforms
`
`AN35 F17
`
`The loop performs well, but has two potential drawbacks.
`At higher output currents the loop oscillates in the 1kHz to
`10kHz range, causing audible noise which may be objec-
`tionable. This is characteristic of this type of loop, and is
`the reason that ICs employing gated oscillators invariably
`produce such noise. Additionally, the control loops opera-
`tion causes about 50mV of ripple on the output. Ripple
`frequency ranges from 0.2Hz to 10kHz depending upon
`input voltage and output current.
`Figure 18’s more sophisticated circuit eliminates these
`problems with some increase in complexity. Quiescent
`current is maintained at 150μA. The technique shown is
`particularly signifi cant, with broad implication in battery
`powered systems. It is easily applied to a wide variety of
`regulator requirements, meeting an acknowledged need
`across a wide spectrum of applications.
`Figure 18’s signal fl ow is similar to Figure 16, but ad-
`ditional circuitry appears between the feedback divider
`and the LT1074. The LT1074’s internal feedback amplifi er
`and reference are not used. Figure 19 shows operating
`
`VIN
`
`VIN
`
`SD
`VC
`
`VSW
`
`LT1074
`
`GND
`
`FB
`
`L1
`35μH
`
`MBR745
`
`+
`
`C2
`2000μF
`
`5VOUT
`
`C3
`0.01
`
`R2
`18k*
`
`R3
`5.9k*
`
`10k
`
`+
`
`LT1004
`1.2V
`
`AN35 F18
`
`12V
`
`470k
`
`2.2μF
`
`0.033
`
`NC
`
`8.2k
`
`12V INPUT
`
`R1
`200Ω
`
`+
`
`C1
`47μF
`
`1N748
`
`–+
`
`A2
`1/2 LT1017
`
`– +
`
`A1
`1/2 LT1017
`
`68pF**
`
`200k**
`
`74C04
`
`L1 = PULSE ENGINEERING, INC. #PE-92103
`* = 1% METAL FILM RESISTOR
`** = TYPICAL VALUES—SEE TEXT
`
`Figure 18. A More Sophisticated Loop Gives Better Regulation While Maintaining 150μA Quiescent Current
`
`AN35-8
`
`an35f
`
`MICROCHIP TECH. INC. - EXHIBIT 1029
`MICROCHIP TECH. INC. V. HD SILICON SOLS. - IPR2021-01265 - Page 008
`
`

`

`waveforms under no-load conditions. The output (Trace A)
`ramps down over a period of seconds. During this time
`comparator A1’s output (Trace B) is low, as are the 74C04
`paralleled inverters. This pulls the VC pin (Trace D) low,
`forcing the regulator to zero duty cycle. Simultaneously, A2
`(Trace C) is low, putting the LT1074 in its 100μA shutdown
`mode. The VSW pin (Trace E) is off, and no inductor current
`fl ows. When the output drops about 60mV, A1 triggers and
`the inverters go high, pulling the VC pin up and biasing the
`regulator. The Zener diode prevents VC pin overdrive. A2
`also rises, taking the IC out of shutdown mode. The VSW
`pin pulses the inductor at the 100kHz clock rate, causing
`the output to abruptly rise. This action trips A1 low, forcing
`the VC pin back low and shutting off VSW pulsing. A2 also
`goes low, putting the LT1074 into shutdown.
`This “bang-bang” control loop keeps the 5V output within
`the 60mV ramp hysteresis window set by the loop. Note
`that the loop oscillation period of seconds means the R1-C1
`
`Application Note 35
`
`time constant at VC is not a signifi cant term. Because the
`LT1074 spends almost all of the time in shutdown, very
`little quiescent current (150μA) is drawn.
`Figure 20 shows the same waveforms with the load in-
`creased to 2mA. Loop oscillation frequency increases to
`keep up with the load’s sink current demand. Now, the VC
`pin waveform (Trace D) begins to take on a fi ltered ap-
`pearance. This is due to R1-C1’s 10ms time constant. If
`the load continues to increase, loop oscillation frequency
`will also increase. The R1-C1 time constant, however, is
`fi xed. Beyond some frequency, R1-C1 must average loop
`oscillations to DC. At 7mA loading (Figure 21) loop fre-
`quency further increases, and the VC waveform (Trace D)
`appears heavily fi ltered.
`Figure 22 shows the same circuit points at 2A loading.
`Note that the VC pin is at DC, as is the shutdown pin.
`Repetition rate has increased to the LT1074’s 100kHz
`
`A = 0.1V/DIV
`AC-COUPLED
`B = 20V/DIV
`
`C = 20V/DIV
`
`D = 2V/DIV
`
`E = 10V/DIV
`
`A = 0.1V/DIV
`AC-COUPLED
`
`B = 20V/DIV
`C = 20V/DIV
`
`D = 2V/DIV
`
`E = 10V/DIV
`
`HORIZ = 0.5 SECOND/DIV
`
`AN35 F19
`
`HORIZ = 20ms/DIV
`
`AN35 F20
`
`Figure 19. Low Quiescent Current Regulator’s Waveforms
`with No Load (Traces B, C and E Retouched for Clarity)
`
`Figure 20. Low Quiescent Current Regulator’s Waveforms at 2mA
`Loading
`
`A = 0.1V/DIV
`AC-COUPLED
`
`B = 20V/DIV
`C = 20V/DIV
`
`D = 2V/DIV
`
`E = 10V/DIV
`
`A = 0.2V/DIV
`AC-COUPLED
`B = 20V/DIV
`
`C = 20V/DIV
`D = 2V/DIV
`
`E = 20V/DIV
`
`HORIZ = 10ms/DIV
`
`AN35 F21
`
`HORIZ—TRACES A AND E = 10μs/DIV
` TRACES B, C, D = 5ms/DIV
`
`AN35 F22
`
`Figure 21. Low Quiescent Current Regulator’s Waveforms at 7mA
`Loading
`
`Figure 22. Low Quiescent Current Regulator’s Waveforms at 2A
`Loading
`
`an35f
`
`AN35-9
`
`MICROCHIP TECH. INC. - EXHIBIT 1029
`MICROCHIP TECH. INC. V. HD SILICON SOLS. - IPR2021-01265 - Page 009
`
`

`

`Application Note 35
`
`clock frequency. Figure 23 plots what is occurring, with
`a pleasant surprise. As output current rises, loop oscilla-
`tion frequency also rises until about 23Hz. At this point
`the R1-C1 time constant fi lters the VC pin to DC and the
`LT1074 transitions into “normal” PWM operation. With
`the VC pin at DC it is convenient to think of A1 and the
`inverters as a linear error amplifi er with a closed-loop gain
`set by the R2-R3 feedback divider. In fact, A1 is still duty
`cycle modulating, but at a rate far above R1-C1’s break
`frequency. The phase error contributed by C2 (which was
`selected for low loop frequency at low output currents)
`is dominated by the R1-C1 roll off and the C3 lead into
`A1. The loop is stable and responds linearly for all loads
`beyond 10mA. In this high current region the LT1074 is
`desirably “fooled” into behaving like a conventional step-
`down regulator.
`A formal stability analysis for this circuit is quite complex,
`but some simplifi cations lend insight into loop operation.
`At 250μA loading (20kΩ) C2 and the load form a decay
`time constant exceeding 30 seconds. This is orders of
`magnitude larger than R2-C3, R1-C1, or the LT1074’s
`100kHz commutation rate. As a result, C2 dominates the
`loop. Wideband A1 sees phase shifted feedback, and very
`low frequency oscillations similar to Figure 19’s occur5.
`Although C2’s decay time constant is long, its charge
`time constant is short because the circuit has low sourc-
`ing impedance. This accounts for the ramp nature of the
`oscillations.
`Increased loading reduces the C2-load decay time con-
`stant. Figure 23’s plot refl ects this. As loading increases,
`
`the loop oscillates at a higher frequency due to C2’s de-
`creased decay time. When the load impedance becomes
`low enough C2’s decay time constant ceases to dominate
`the loop. This point is almost entirely determined by R1
`and C1. Once R1 and C1 “take over” as the dominant time
`constant the loop begins to behave like a linear system.
`In this region (e.g., above about 10mA, per Figure 23)
`the LT1074 runs continuously at its 100kHz rate. Now,
`C3 becomes signifi cant, performing as a simple feedback
`lead6 to smooth output response. There is a fundamental
`trade-off in the selection of the C3 lead value. When the
`converter is running in its linear region it must dominate
`the loops time lag generated hysteretic characteristic. As
`such, it has been chosen for the best compromise between
`output ripple at high load and loop transient response.
`Despite the complex dynamics transient response is quite
`good. Figure 24 shows performance for a step from no
`load to 1A. When Trace A goes high a 1A load appears
`across the output (Trace C). Initially, the output sags al-
`most 200mV due to slow loop response time (the R1-C1
`pair delay VC pin (Trace B) response). When the LT1074
`comes on response is reasonably quick and surprisingly
`well behaved considering circuit dynamics. The multi-time
`constant recovery7 (“rattling” is perhaps more appropriate)
`is visible in Trace C’s response.
`
`Note 5: Some layouts may require substantial trace area to A1’s inputs. In
`such cases the optional RC network around A1 ensures clean transitions
`at A1’s output.
`Note 6: “Zero Compensation” for all you technosnobs out there.
`Note 7: Once again, “multi-pole settling” for those who adore jargon.
`
`LINEAR REGION
`
`EXTENDS
`TO 5.0A
`
`A = 10V/DIV
`
`B = 2V/DIV
`
`C = 0.2V/DIV
`ON 5V DC LEVEL
`
`IQ = 150μA
`0.6Hz
`
`0
`
`2
`
`4
`
`6
`OUTPUT (mA)
`
`8
`
`10
`
`12
`
`AN35 F23
`
`HORIZ = 5ms/DIV
`
`AN35 F24
`
`Figure 24. Load Transient Response for Figure 18
`
`20
`
`16
`
`12
`
`48
`
`0
`
`LOOP FREQUENCY (Hz)
`
`Figure 23. Figure 18’s Loop Frequency vs Output Current.
`Note Linear Loop Operation Above 10mA
`
`AN35-10
`
`an35f
`
`MICROCHIP TECH. INC. - EXHIBIT 1029
`MICROCHIP TECH. INC. V. HD SILICON SOLS. - IPR2021-01265 - Page 010
`
`

`

`Application Note 35
`
`a toroidal DC/DC converter comprised of L1, Q1 and Q2.
`Q1 and Q2 receive out of phase square wave drive from
`the 74C74 ÷ 4 fl ip-fl op stage and the LT1010 buffers. The
`fl ip-fl op is clocked from the LT1074 VSW output via the Q3
`level shifter. The LT1086 provides 12V power for A1 and the
`74C74. A1 biases the LT1074 regulator to produce the DC
`input at the DC/DC converter required to balance to loop.
`The converter has a voltage gain of about 20, resulting
`in high voltage output. This output is resistively divided
`down, closing the loop at A1’s negative input. Frequency
`compensation for this loop must accommodate the signifi -
`cant phase errors generated by the LT1074 confi guration,
`the DC/DC converter and the output LC fi lter. The 0.47μF
`roll-off term at A1 and the 100Ω-0.15μF RC lead network
`provide the compensation, which is stable for all loads.
`Figure 27 gives circuit waveforms at 500V output into a
`100W load. Trace A is the LT1074 VSW pin while Trace B is
`its current. Traces C and D are Q1 and Q2’s drain waveforms.
`The disturbance at the leading edges is due to cross-current
`conduction, which lasts about 300ns—a small percent-
`age of the cycle. Transistor currents during this interval
`remain within reasonable values, and no overstress or
`dissipation problems occur. This effect could be eliminated
`with non-overlapping drive to Q1 and Q28, although there
`would be no reliability or signifi cant effi ciency gain. The
`500kHz ringing on the same waveforms is due to excita-
`tion of transformer resonances. These phenomena are not
`deleterious, although L1’s primary RC damper is included
`to minimize them.
`All waveforms are synchronous because the fl ip-fl op
`drive stage is clocked from the LT1074 VSW output. The
`LT1074’s maximum 95% duty cycle means that the Q1-Q2
`switches can never see destructive DC drive. The only
`condition allowing DC drive occurs when the LT1074 is
`at zero duty cycle. This case is clearly non-destructive,
`because L1 receives no power.
`Figure 28 shows the same circuit points as Figure 27,
`but at only 5mV output. Here, the loop restricts drive to
`the DC/DC converter to small levels. Q1 and Q2 chop just
`70mV into L1. At this level L1’s output diode drops look
`large, but loop action forces the desired 0.005V output.
`Note 8: For an example of this technique see LTC Application Note 29,
`Figure 1.
`
`an35f
`
`AN35-11
`
`Figure 25 plots effi ciency versus output current. High
`power effi ciency is similar to standard converters. Low
`power effi ciency is somewhat better, although poor in
`the lowest ranges. This is not particularly bothersome,
`as power loss is very small.
`The loop provides a controlled, conditional instability
`instead of the usually more desirable (and often elusive)
`unconditional stability. This deliberately introduced char-
`acteristic dramatically lowers converter quiescent current
`without sacrifi cing high power performance.
`
`TYPICAL OPERATING
`REGION
`
`20mA
`5mA
`1mA
`IQ = 150μA
`0.5
`1.5
`1.0
`OUTPUT CURRENT
`
`TYPICAL STANDBY
`REGION
`
`2.0
`
`2.5
`
`AN35 F25
`
`100
`
`90
`
`80
`
`70
`
`60
`
`50
`
`40
`
`30
`
`20
`
`10
`
`0
`
`0
`
`EFFICIENCY (%)
`
`Figure 25. Efficiency vs Output Current for Figure 18.
`Standby Efficiency is Poor, But Power Loss Approaches
`Battery Self-Discharge
`
`Wide Range, High Power, High Voltage Regulator
`BEFORE PROCEEDING ANY FURTHER, THE READER
`IS WARNED THAT CAUTION MUST BE USED IN THE
`CONSTRUCTION, TESTING AND USE OF THIS CIRCUIT.
`HIGH VOLTAGE, LETHAL POTENTIALS ARE PRESENT IN
`THIS CIRCUIT. EXTREME CAUTION MUST BE USED IN
`WORKING WITH AND MAKING CONNECTIONS TO THIS
`CIRCUIT. REPEAT: THIS CIRCUIT CONTAINS DANGER-
`OUS, HIGH VOLTAGE POTENTIALS. USE CAUTION.
`Figure 26 is an example of the LT1074 making a complex
`function practical. This regulator provides outputs from mil-
`livolts to 500V at 100W with 80% effi ciency. A1 compares
`a variable reference voltage with a resistively scaled version
`of the circuit’s output and biases the LT1074 switching
`regulator confi guration. The switcher’s DC output drives
`
`MICROCHIP TECH. INC. - EXHIBIT 1029
`MICROCHIP TECH. INC. V. HD SILICON SOLS. - IPR2021-01265 - Page 011
`
`

`

`AN35 F26
`
`1% FILM
`13.7k
`
`CALIB.
`OUTPUT
`1kΩ
`
`ADJUST
`OUTPUT
`
`100k
`
`28V
`
`LT1021-7V
`
`100k
`
`* = VICTOREEN SLIM-MOX-108
`Q1, Q2 = MOTOROLA MTH15N20
`L3 = PULSE ENGINEERING, INC. #PE-52649
`L2 = PULSE ENGINEERING, INC. #PE-92112
`L1 = TRIAD TY-94
`
`– +
`
`LTC1050
`
`A1
`
`0.47
`
`12V
`
`1000μF
`
`+
`
`MUR8100
`
`0.15
`
`100Ω
`
`100μH
`
`L2
`
`Application Note 35
`
`1M*
`
`1000V
`1μF
`
`0V TO 500VOUT
`
`200mA
`
`1000V
`0.1μF
`
`680μH
`
`L3
`
`POTENTIALS PRESENT IN SCREENED
`
`DANGER! LETHAL
`
`AREA. SEE TEXT
`
`MUR1100
`
`(cid:115)4
`
`1
`
`2 3 4
`
`L1
`
`5
`
`6
`
`7
`
`2W
`10Ω
`
`0.005
`
`D
`
`S
`
`Q2
`
`TANTALUM
`SOLID
`100μF
`
`+
`
`Q1
`
`D
`
`S
`
`LT1010
`
`28VIN
`
`LT1010
`
`28VIN
`
`1k
`
`2N2369
`Q3
`
`2C2CK
`2Q
`2D
`2Q
`
`1C1CK2P
`
`74C74
`
`GND
`
`+V
`
`2k
`
`1P
`1Q
`1D
`1Q
`
`DANGER! Lethal Potentials Present—See Text
`Figure 26. LT1074 Permits High Voltage Output Over 100dB Range with Power and Efficiency.
`
`1N914
`
`NC
`
`FB
`
`VSW
`
`GND
`
`VC
`
`LT1074
`
`GND
`
`LT1086-12
`
`OUT
`
`+
`
`22μF
`
`VIN
`
`IN
`
`12V
`
`+
`
`TANTALUM
`SOLID
`100μF
`28VIN
`
`AN35-12
`
`an35f
`
`MICROCHIP TECH. INC. - EXHIBIT 1029
`MICROCHIP TECH. INC. V. HD SILICON SOLS. - IPR2021-01265 - Page 012
`
`

`

`Application Note 35
`
`A = 50V/DIV
`
`B = 5A/DIV
`
`C = 50V/DIV
`
`D = 50V/DIV
`
`A = 5V/DIV
`
`B = 50mA/DIV
`
`C = 0.1V/DIV
`
`D = 0.1V/DIV
`
`HORIZ = 10μs/DIV
`
`AN35 F27
`
`HORIZ = 10μs/DIV
`
`AN35 F28
`
`Figure 27. Figu